1. Field of the Invention
The present invention relates to a channel search device, and particularly relates to a channel search device for searching a channel in an n-phase PSK (phase shift keying) modulation signal, which is used for digital satellite broadcasting or the like.
2. Description of the Related Art
FIG. 12 shows an example of a channel distribution in a PSK modulation signal. A first channel CH1 has a carrier frequency of f1 (Hz) and a symbol rate of S1 (baud). A second channel CH2 has a carrier frequency of f2 (Hz) and a symbol rate of S2 (baud). A third channel CH3 has a carrier frequency of f3 (Hz) and a symbol rate of S3 (baud). A fourth channel CH4 has a carrier frequency of f4 (Hz) and a symbol rate of S4 (baud).
To demodulate the PSK modulation signal, it is necessary to set carrier frequencies and symbol rates according to each channel. For example, when it is known in advance that there are four channels CH1 to CH4 to be inputted as shown in FIG. 12, a channel selecting operation after setting the channels is smoothly performed if channel information (carrier frequencies and symbol rates) is incorporated in a PSK modulator in advance as shown in FIG. 13.
FIG. 14 shows the configuration of a PSK demodulator (channel search device) according to a prior art. A quasi-synchronization quadrature detector 1401 includes an amplifier 1411, multipliers 1412I and 1412Q, low pass filters 1413I and 1413Q, an oscillator 1414, and a 90-degree phase shifter 1415. The amplifier 1411 amplifies, according to a gain control signal AB outputted by a gain controller 1404, a PSK modulation signal IN, and outputs it to the multipliers 1412I and 1412Q. The oscillator 1414 generates, according to a carrier frequency set value fRF, a cosine wave, and outputs it to the multiplier 1412I. Here, the carrier frequency set value fRF is set in such a manner that, for example, when channels CH1 to CH4 are selected, frequencies f1 to f4 are respectively set. The 90-degree phase shifter 1415 shifts a phase of the cosine wave generated by the oscillator 1414 by 90 degree, and outputs a sine wave to the multiplier 1412Q.
The multiplier 1412I multiplies the PSK modulation signal and the sine wave. The PSK modulation signal IN is represented by the following formula.IN=I cos ωt+Q sin ωt
The low pass filter 1413I only lets a low frequency constituent in the output of the multiplier 1412I pass therethrough, and outputs an I-axis signal IA.
The multiplier 1412Q multiplies the PSK modulation signal and the cosine wave. The low pass filter 1413Q only lets a low frequency constituent in the output of the multiplier 1412Q pass therethrough, and outputs a Q-axis signal QA.
The quasi-synchronization quadrature detector 1401 performs quasi-synchronization quadrature detection on the PSK modulation signal, and outputs an I-axis signal IA and a Q-axis signal QA. FIG. 15A shows the I-axis signal and the Q-axis signal in a four-phase PSK modulation signal. In the four-phase PSK modulation, these signals can take four states on a reference circle. FIG. 15B shows the I-axis signal and the Q-axis signal in a two-phase PSK modulation signal, which can take two states on the reference circle. The FIG. 15C shows the I-axis signal and the Q-axis signal in an eight-phase PSK modulation signal, which can take eight states on the reference circle.
An A/D converter 1402I converts the I-axis signal IA in an analog format to an I-axis signal ID in a digital format. An A/D converter 1402Q converts the Q-axis signal QA in an analog format to a Q-axis signal QD in a digital format.
A timing reproducer 1403 reproduces the I-axis signal ID and the Q-axis signal QD while correcting an error of a symbol rate SR, outputs an I-axis signal I1 and a Q-axis signal Q1, and detects and outputs a displacement amount ΔSerr of the symbol rate SR. Here, the symbol rate SR is set in such a manner that, for example, when channels CH1 to CH4 are selected, symbol rates S1 to S4 are respectively set.
The gain controller 1404 compares the amplitude of a symbol comprising the I-axis signal I1 and the Q-axis signal Q1 with a reference amplitude, and outputs the gain control signal AB according to the difference thereof. The amplifier 1411 amplifies the PSK modulation signal IN according to the gain control signal AB.
A carrier reproducer 1405 corrects a phase displacement of a symbol comprising the I-axis signal I1 and the Q-axis signal Q1, outputs an I-axis signal I2 and a Q-axis signal Q2, and outputs a displacement amount Δferr of the carrier frequency fRF.
An error corrector 1406 corrects an error of a symbol comprising the I-axis signal I2 and the Q-axis signal Q2, and outputs a demodulation signal SIG.
A synchronization detector 1407 performs detection of a unique word from a data row of the demodulation signal SIG, and outputs a high level as a synchronization signal SYNC when the unique word can be detected in a constant period, and outputs a low level when the unique word cannot be detected.
The PSK demodulator of FIG. 14 is incorporated in a system such as an STB (Set Top Box). The above-described carrier frequency fRF and the symbol rate SR can be set to the values of FIG. 13 in order to select respective channels CH1 to CH4.
However, when the system is used under an environment in which a change in the channel information (carrier frequencies and symbol rates) occurs, the channel information cannot be set in advance, so that it is necessary to obtain all the existing channels (a channel search), for example, when the power is turned on.
FIG. 16 is a flow chart showing processings of a channel search according to the prior art. The channel search is performed by the following procedure using the PSK demodulator of FIG. 14. First, in Step S1601, a symbol rate SR is set to S0. The symbol rate S0 is the minimum value of a symbol rate setting. Next, in Step S1602, a carrier frequency fFR is set to f0. The carrier frequency f0 is the minimum value of a carrier frequency setting. Next, in Step S1603, the system stands by for a time tDEM(s) that is necessary for the demodulation processing to be completed.
Here, the standby time tDEM is the sum total of a time necessary for the timing reproducer 1403 to complete timing reproduction, a time necessary for the carrier reproducer 1405 to complete carrier reproduction, a time necessary for the error corrector 1406 to complete error correction, and a time necessary for the synchronization detector 1407 to complete synchronization detection.
If the difference between the symbol rate SR and the symbol rate of a channel is within a pull-in range of the timing reproducer 1403, and the difference between the carrier frequency fRF and the carrier frequency of the channel is within a pull-in range of the carrier reproducer 1405, the timing reproducer 1403 corrects the difference ΔSerr between the symbol rate SR and the actual symbol rate, and the carrier reproducer 1405 corrects the difference Δ ferr between the carrier frequency fRF and the carrier frequency of the actual channel, so that a synchronization signal SYNC becomes high level (“H”). In other words, when the synchronization signal SYNC is high level, it means that a channel exists, and when it is low level, it means that a channel does not exist.
Next, in Step S1604, it is checked whether the synchronization signal SYNC is high level or not. If it is high level, the system proceeds to Step S1605, and if it is low level, the system proceeds to Step S1607. In Step S1605, the carrier frequency displacement amount Δferr of the carrier reproducer 1405 and the symbol rate displacement amount ΔSerr of the timing reproducer 1403 are monitored. Next, in Step S1606, SR+ΔSerr as a symbol rate and fRF+Δferr as a carrier frequency of which a channel exists are respectively stored in a memory in the system.
Next, in Step S1607, it is checked whether the carrier frequency fRF is larger than fX or not. The carrier frequency fX is the maximum value of the carrier frequency setting. If it is not larger, the system proceeds to Step S1608, and if it is larger, the system proceeds to Step S1609. In Step S1608, a frequency variation Δf is added to the set value of the carrier frequency fRF. Thereafter, the system returns to Step S1603, and repeats the above-described processings on a new carrier frequency fRF.
In Step S1609, it is checked whether the symbol rate SR is larger than SX or not. The symbol rate SX is the maximum value of the symbol rate setting. If it is not larger, the system proceeds to Step S1610, and if it is larger, the system terminates the processing. In Step S1610, a symbol rate variation ΔS is added to the set value of the symbol rate SR. Thereafter, the system returns to Step S1602, and repeats the above-described processings on a new symbol rate SR.
By this channel search, for example, the carrier frequencies and the symbol rates for the four channels shown in FIG. 13 can be obtained.
In addition, the following patent document 1 discloses a receiver for receiving a digital modulation signal such as a QPSK, and a technology for calculating a sweep frequency range of a carrier to be searched based on the transmission speed of a carrier to be selected, and performing a synchronization pull-in.
Patent Document 1
U.S. Pat. No. 6,389,082
When performing the channel search, it is necessary to wait in Step S1603 for the time tDEM(s) for each symbol rate SR and carrier frequency fRF. In the time tDEM, in particular, the time necessary for the carrier reproducer 1405 to complete carrier reproduction requires the longest time. Especially, when a reception state of the inputted PSK modulation signal IN is poor, or when the displacement between the carrier frequency fRF and an actual carrier frequency is large, it consumes much more time, which poses a problem of requiring a long period of time to complete the channel search.